[PATCH] D99029: [RISCV] Don't form MULW for (sext_inreg (mul X, Y), i32)) if the mul has another use.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 333020.
craig.topper added a comment.

Rename mul_su->mul_oneuse


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99029/new/

https://reviews.llvm.org/D99029

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoM.td
  llvm/test/CodeGen/RISCV/xaluo.ll

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