[PATCH] D99128: [AMDGPU] Removed unnecessary cache invalidations.
Sameer Sahasrabuddhe via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 23 08:18:02 PDT 2021
sameerds added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1619
+
+ if (MI.getOpcode() == AMDGPU::BUFFER_WBINVL1 ||
+ MI.getOpcode() == AMDGPU::BUFFER_WBINVL1_SC ||
----------------
This condition and the previous one need to be captured as a function with a meaningful name. Or if TableGen is involved in this enum, then perhaps a property on the instruction.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D99128/new/
https://reviews.llvm.org/D99128
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