[PATCH] D99128: [AMDGPU] Removed unnecessary cache invalidations.

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 23 06:59:51 PDT 2021


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:309
+
+  void setPontentiallyDirtyCacheAtLevel(MemoryCacheLevel Level) {
+    HasPotentiallyDirtyCache[Level] = true;
----------------
Typo "pontentially".


================
Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:313
+
+  void clearPontentiallyDirtyCacheAtLevel(MemoryCacheLevel Level) {
+    HasPotentiallyDirtyCache[Level] = false;
----------------
Typo "pontentially".


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99128/new/

https://reviews.llvm.org/D99128



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