[PATCH] D98920: [RISCV] Add constraint for rvv indexed loads.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:673
 class VPseudoILoadNoMask<VReg RetClass, VReg IdxClass, bits<7> EEW, bits<3> LMUL,
-                         bit Ordered>:
+                         bit Ordered, bit HasConstraints>:
       Pseudo<(outs RetClass:$rd),
----------------
Can we rename HasConstraints to EarlyClobber?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98920/new/

https://reviews.llvm.org/D98920