[PATCH] D98920: [RISCV] Add constraint for rvv indexed loads.

[Zakk Chen via Phabricator via llvm-commits]

khchen updated this revision to Diff 332280.
khchen added a comment.

Rebase, update mgather tests.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98920/new/

https://reviews.llvm.org/D98920

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll

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