[PATCH] D98936: [RISCV] DAG nodes and pseudo instructions for CSR access

[Serge Pavlov via Phabricator via llvm-commits]

sepavloff updated this revision to Diff 332286.
sepavloff added a comment.

Updated patch

- Removed asm operands from Read_CSR and friends,
- Added classes for defining operations on specific system registers.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98936/new/

https://reviews.llvm.org/D98936

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.td

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