[PATCH] D98968: [AArch64] Fix LowerMGATHER to return the chain result for floating point gathers.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 19 10:38:27 PDT 2021
craig.topper created this revision.
craig.topper added reviewers: kmclaughlin, david-arm, sdesmalen.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
craig.topper requested review of this revision.
Herald added a project: LLVM.
Found by adding asserts to LegalizeDAG to make sure custom legalized
results had the right types.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D98968
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4118,7 +4118,7 @@
if (VT.isFloatingPoint()) {
SDValue Cast = getSVESafeBitCast(VT, Gather, DAG);
- return DAG.getMergeValues({Cast, Gather}, DL);
+ return DAG.getMergeValues({Cast, Gather.getValue(1)}, DL);
}
return Gather;
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D98968.331925.patch
Type: text/x-patch
Size: 479 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210319/dfc34cca/attachment.bin>
More information about the llvm-commits
mailing list