[PATCH] D98857: [DAG] computeKnownBits - add ISD::MULHS/ISD::MULHU handling

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In D98857#2636074 <https://reviews.llvm.org/D98857#2636074>, @nagisa wrote:

> I think you may be able to quite easily add a case for S/UMUL_LOHI here as well (but unsure if its necessary, just noticing that its not explicitly handled here)

I'm happy to do that (and MULHS NumSignBits) as followup patches.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2983
+  case ISD::MULHU: {
+    // mulhu(x,y) -> trunc(srl(mul(zext(x),zext(y)),bw)).
+    Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
----------------
nagisa wrote:
> What does this (and a similar one below) comment signify?
It was of more use when I did the expansion here instead of inside KnownBits - I'll drop it


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98857/new/

https://reviews.llvm.org/D98857