[PATCH] D98857: [DAG] computeKnownBits - add ISD::MULHS/ISD::MULHU handling

[Simonas Kazlauskas via Phabricator via llvm-commits]

nagisa added a comment.

I think you may be able to quite easily add a case for S/UMUL_LOHI here as well (but unsure if its necessary, just noticing that its not explicitly handled here)



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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2983
+  case ISD::MULHU: {
+    // mulhu(x,y) -> trunc(srl(mul(zext(x),zext(y)),bw)).
+    Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
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