[PATCH] D98821: [RISCV] Improve 64-bit integer materialization for some cases.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/sadd_sat.ll:120
+; RV64I-NEXT:  .LBB1_5:
+; RV64I-NEXT:    mv a0, a2
 ; RV64I-NEXT:    ret
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Hm, would be nice to not make this pattern worse


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98821/new/

https://reviews.llvm.org/D98821