[PATCH] D98819: [M68k] Replace unknown operand with explicit type

[Ricky Taylor via Phabricator via llvm-commits]

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Replace the unknown operand used for immediate operands for DIV/MUL with a fixed 16-bit immediate.

This is required since the assembly parser generator requires that all operands are typed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98819

Files:
  llvm/lib/Target/M68k/M68kInstrArithmetic.td


Index: llvm/lib/Target/M68k/M68kInstrArithmetic.td
===================================================================
--- llvm/lib/Target/M68k/M68kInstrArithmetic.td
+++ llvm/lib/Target/M68k/M68kInstrArithmetic.td
@@ -522,7 +522,7 @@
 // $reg <- $reg op $imm
 class MxDiMuOp_DI<string MN, bits<4> CMD, MxBead3Bits OPMODE,
                   MxOperand DST, MxOperand OPD>
-    : MxInst<(outs DST:$dst), (ins DST:$src, unknown:$opd), MN#"\t$opd, $dst", [],
+    : MxInst<(outs DST:$dst), (ins DST:$src, OPD:$opd), MN#"\t$opd, $dst", [],
              MxDiMuEncoding<MxBead4Bits<CMD>, OPMODE, MxEncEAi, MxExtI16_2>>;
 } // let Constraints
 } // Defs = [CCR]
@@ -545,6 +545,11 @@
 
 defm DIV : MxDiMuOp<"div", 0x8>;
 
+// This is needed as division only takes a 16-bit immediate.
+def as_i16imm : SDNodeXForm<imm, [{
+  return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i16);
+}]>;
+
 // RR i8
 def : Pat<(sdiv i8:$dst, i8:$opd),
           (EXTRACT_SUBREG
@@ -591,22 +596,22 @@
 // RI i8
 def : Pat<(sdiv i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (SDIVd32i16 (MOVSXd32d8 $dst), imm:$opd),
+            (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd)),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(udiv i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (UDIVd32i16 (MOVZXd32d8 $dst), imm:$opd),
+            (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd)),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(srem i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d8 $dst), imm:$opd), 8), 8),
+            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd)), 8), 8),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(urem i8:$dst, MximmSExt8:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d8 $dst), imm:$opd), 8), 8),
+            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd)), 8), 8),
              MxSubRegIndex8Lo)>;
 
 // RI i16


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