[PATCH] D98704: [AArch64] Rewrite (add, csel) to cinc
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 17 10:47:53 PDT 2021
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks. LGTM
The lowering/optimization of CSEL/CSINC/etc feels a bit weak to me, so any improvements are good to see. Tablegen improvements especially as (as far as I understand) they can help in both SelectionDag and GlobalISel.
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https://reviews.llvm.org/D98704/new/
https://reviews.llvm.org/D98704
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