[PATCH] D98704: [AArch64] Rewrite (add, csel) to cinc

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

This now generates cinc, which is even better.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13150
 
+  // If both operands are a SET_CC, then we don't want to perform this
+  // folding and create another csel as this results in more instructions
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I had to keep this, otherwise this lowering will happen first and the pattern, see below, doesn't match,.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:2162
+          (CSINCWr GPR32:$val, GPR32:$val, (i32 imm:$cc))>;
+def : Pat<(add GPR64:$val, (zext (AArch64csel (i32 0), (i32 1), (i32 imm:$cc), NZCV))),
+          (CSINCXr GPR64:$val, GPR64:$val, (i32 imm:$cc))>;
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I had to add an `zext` for this pattern, that's because the way `setcc` is legalised from an i1 to i32 first, then zext'ed to i64.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98704/new/

https://reviews.llvm.org/D98704