[PATCH] D94964: [LangRef] Describe memory layout for vectors types

[Bjorn Pettersson via Phabricator via llvm-commits]

bjope added inline comments.


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Comment at: llvm/docs/LangRef.rst:3226
+
+When ``<N*M>`` isn't evenly divisible by the byte size the memory layout is
+unspecified.
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dmgreen wrote:
> Does this apply to a v4i1? I thought that worked the same way as any other i1 type. The defined bits end up in the MSBs.
> Does this apply to a v4i1? I thought that worked the same way as any other i1 type. The defined bits end up in the MSBs.

I did not know about such rules for i1 (or other non-byte-sized first class types). Is that really specified somewhere?

The description for `store`, https://llvm.org/docs/LangRef.html#store-instruction , says that "When writing a value of a type like i20 with a size that is not an integral number of bytes, it is unspecified what happens to the extra bits that do not belong to the type, but they will typically be overwritten.". That is not really saying anything about where the padding bits are placed either. I've assumed that the placement is unspecified as well (as I've never seen any definition).


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