[PATCH] D98561: [RISCV] Support masked load/store for fixed vectors.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 330704.
craig.topper added a comment.

Add isLegalMaskedLoadStore call it from isLegalMaskedLoad/isLegalMaskedStore


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98561/new/

https://reviews.llvm.org/D98561

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll

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