[PATCH] D98561: [RISCV] Support masked load/store for fixed vectors.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:64
+
+  bool isLegalMaskedLoad(Type *DataType, Align Alignment) {
+    if (!ST->hasStdExtV())
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frasercrmck wrote:
> Personal preference, but since this supports both load and store, for clarity we could make this a separate `isLegalMaskedLoadStore` and have `isLegalMaskedLoad` call that too?
> 
> Additionally, is "legality" here just that it shouldn't scalarize? Will the legalizer split too-wide vectors?
I believe the loop vectorizer calls this with a scalar type. There's a separate cost function too. The ScalarizeMaskedMemIntrinsic pass will call it with a fixed vector type to know if it needs to scalarize and insert conditional branches. The type legalizer in SelectionDAG can handle splitting, but not scalarizing.


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  https://reviews.llvm.org/D98561/new/

https://reviews.llvm.org/D98561