[llvm] 660728a - [InstSimplify] ctlz({signbit} >>u x) --> x

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-03-15T12:03:35-04:00
New Revision: 660728acd4f09294d18b9a0b51b8e94a68efd1a5

URL: https://github.com/llvm/llvm-project/commit/660728acd4f09294d18b9a0b51b8e94a68efd1a5
DIFF: https://github.com/llvm/llvm-project/commit/660728acd4f09294d18b9a0b51b8e94a68efd1a5.diff

LOG: [InstSimplify] ctlz({signbit} >>u x) --> x

The motivating pattern was handled in 0a2d69480d ,
but we should have this for symmetry.

But this really highlights that we could generalize for
any shifted constant if we match this in instcombine.

https://alive2.llvm.org/ce/z/MrmVNt

Added: 
    

Modified: 
    llvm/lib/Analysis/InstructionSimplify.cpp
    llvm/test/Transforms/InstSimplify/call.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 5b5dce0410b3..5e05cb03d831 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -5470,6 +5470,12 @@ static Value *simplifyBinaryIntrinsic(Function *F, Value *Op0, Value *Op1,
       return X;
     break;
   }
+  case Intrinsic::ctlz: {
+    Value *X;
+    if (match(Op0, m_LShr(m_SignMask(), m_Value(X))))
+      return X;
+    break;
+  }
   case Intrinsic::smax:
   case Intrinsic::smin:
   case Intrinsic::umax:

diff  --git a/llvm/test/Transforms/InstSimplify/call.ll b/llvm/test/Transforms/InstSimplify/call.ll
index a219948b2ecb..77cd0bcd0ad1 100644
--- a/llvm/test/Transforms/InstSimplify/call.ll
+++ b/llvm/test/Transforms/InstSimplify/call.ll
@@ -1381,6 +1381,8 @@ define <3 x i33> @cttz_shl1_vec(<3 x i33> %x) {
   ret <3 x i33> %r
 }
 
+; Negative test - this could be generalized in instcombine though.
+
 define i32 @cttz_shl_not_low_bit(i32 %x) {
 ; CHECK-LABEL: @cttz_shl_not_low_bit(
 ; CHECK-NEXT:    [[S:%.*]] = shl i32 2, [[X:%.*]]
@@ -1397,9 +1399,7 @@ declare <3 x i33> @llvm.ctlz.v3i33(<3 x i33>, i1)
 
 define i32 @ctlz_lshr_sign_bit(i32 %x) {
 ; CHECK-LABEL: @ctlz_lshr_sign_bit(
-; CHECK-NEXT:    [[S:%.*]] = lshr i32 -2147483648, [[X:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
-; CHECK-NEXT:    ret i32 [[R]]
+; CHECK-NEXT:    ret i32 [[X:%.*]]
 ;
   %s = lshr i32 2147483648, %x
   %r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
@@ -1408,15 +1408,15 @@ define i32 @ctlz_lshr_sign_bit(i32 %x) {
 
 define <3 x i33> @ctlz_lshr_sign_bit_vec(<3 x i33> %x) {
 ; CHECK-LABEL: @ctlz_lshr_sign_bit_vec(
-; CHECK-NEXT:    [[S:%.*]] = lshr <3 x i33> <i33 undef, i33 -4294967296, i33 -4294967296>, [[X:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> [[S]], i1 false)
-; CHECK-NEXT:    ret <3 x i33> [[R]]
+; CHECK-NEXT:    ret <3 x i33> [[X:%.*]]
 ;
   %s = lshr <3 x i33> <i33 undef, i33 4294967296, i33 4294967296>, %x
   %r = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> %s, i1 false)
   ret <3 x i33> %r
 }
 
+; Negative test - this could be generalized in instcombine though.
+
 define i32 @ctlz_lshr_not_sign_bit(i32 %x) {
 ; CHECK-LABEL: @ctlz_lshr_not_sign_bit(
 ; CHECK-NEXT:    [[S:%.*]] = lshr i32 -1, [[X:%.*]]
@@ -1428,6 +1428,8 @@ define i32 @ctlz_lshr_not_sign_bit(i32 %x) {
   ret i32 %r
 }
 
+; TODO: Reduce to 0.
+
 define i32 @ctlz_ashr_sign_bit(i32 %x) {
 ; CHECK-LABEL: @ctlz_ashr_sign_bit(
 ; CHECK-NEXT:    [[S:%.*]] = ashr i32 -2147483648, [[X:%.*]]