[llvm] 3c93852 - [InstSimplify] add tests for ctlz of shifted constant; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-03-15T12:03:35-04:00
New Revision: 3c93852a78e4165080678c5ede2973ad2729de6d

URL: https://github.com/llvm/llvm-project/commit/3c93852a78e4165080678c5ede2973ad2729de6d
DIFF: https://github.com/llvm/llvm-project/commit/3c93852a78e4165080678c5ede2973ad2729de6d.diff

LOG: [InstSimplify] add tests for ctlz of shifted constant; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstSimplify/call.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstSimplify/call.ll b/llvm/test/Transforms/InstSimplify/call.ll
index 5b4acb59c270..a219948b2ecb 100644
--- a/llvm/test/Transforms/InstSimplify/call.ll
+++ b/llvm/test/Transforms/InstSimplify/call.ll
@@ -1291,7 +1291,7 @@ declare float @fmaxf(float, float)
 
 define float @nobuiltin_fmax() {
 ; CHECK-LABEL: @nobuiltin_fmax(
-; CHECK-NEXT:    [[M:%.*]] = call float @fmaxf(float 0.000000e+00, float 1.000000e+00) [[ATTR3:#.*]]
+; CHECK-NEXT:    [[M:%.*]] = call float @fmaxf(float 0.000000e+00, float 1.000000e+00) #[[ATTR3:[0-9]+]]
 ; CHECK-NEXT:    [[R:%.*]] = call float @llvm.fabs.f32(float [[M]])
 ; CHECK-NEXT:    ret float [[R]]
 ;
@@ -1381,4 +1381,73 @@ define <3 x i33> @cttz_shl1_vec(<3 x i33> %x) {
   ret <3 x i33> %r
 }
 
+define i32 @cttz_shl_not_low_bit(i32 %x) {
+; CHECK-LABEL: @cttz_shl_not_low_bit(
+; CHECK-NEXT:    [[S:%.*]] = shl i32 2, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = shl i32 2, %x
+  %r = call i32 @llvm.cttz.i32(i32 %s, i1 true)
+  ret i32 %r
+}
+
+declare i32 @llvm.ctlz.i32(i32, i1)
+declare <3 x i33> @llvm.ctlz.v3i33(<3 x i33>, i1)
+
+define i32 @ctlz_lshr_sign_bit(i32 %x) {
+; CHECK-LABEL: @ctlz_lshr_sign_bit(
+; CHECK-NEXT:    [[S:%.*]] = lshr i32 -2147483648, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = lshr i32 2147483648, %x
+  %r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
+  ret i32 %r
+}
+
+define <3 x i33> @ctlz_lshr_sign_bit_vec(<3 x i33> %x) {
+; CHECK-LABEL: @ctlz_lshr_sign_bit_vec(
+; CHECK-NEXT:    [[S:%.*]] = lshr <3 x i33> <i33 undef, i33 -4294967296, i33 -4294967296>, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> [[S]], i1 false)
+; CHECK-NEXT:    ret <3 x i33> [[R]]
+;
+  %s = lshr <3 x i33> <i33 undef, i33 4294967296, i33 4294967296>, %x
+  %r = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> %s, i1 false)
+  ret <3 x i33> %r
+}
+
+define i32 @ctlz_lshr_not_sign_bit(i32 %x) {
+; CHECK-LABEL: @ctlz_lshr_not_sign_bit(
+; CHECK-NEXT:    [[S:%.*]] = lshr i32 -1, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = lshr i32 4294967295, %x
+  %r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
+  ret i32 %r
+}
+
+define i32 @ctlz_ashr_sign_bit(i32 %x) {
+; CHECK-LABEL: @ctlz_ashr_sign_bit(
+; CHECK-NEXT:    [[S:%.*]] = ashr i32 -2147483648, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 false)
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = ashr i32 2147483648, %x
+  %r = call i32 @llvm.ctlz.i32(i32 %s, i1 false)
+  ret i32 %r
+}
+
+define <3 x i33> @ctlz_ashr_sign_bit_vec(<3 x i33> %x) {
+; CHECK-LABEL: @ctlz_ashr_sign_bit_vec(
+; CHECK-NEXT:    [[S:%.*]] = ashr <3 x i33> <i33 -4294967296, i33 undef, i33 -4294967296>, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> [[S]], i1 true)
+; CHECK-NEXT:    ret <3 x i33> [[R]]
+;
+  %s = ashr <3 x i33> <i33 4294967296, i33 undef, i33 4294967296>, %x
+  %r = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> %s, i1 true)
+  ret <3 x i33> %r
+}
+
 attributes #0 = { nobuiltin readnone }