[llvm] b0b9126 - [AArch64] Expand build-vector-extract.ll tests to i8's. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 14 08:29:26 PDT 2021
Author: David Green
Date: 2021-03-14T15:29:14Z
New Revision: b0b9126897ed7d0143a2a4b112cb04808d1df00b
URL: https://github.com/llvm/llvm-project/commit/b0b9126897ed7d0143a2a4b112cb04808d1df00b
DIFF: https://github.com/llvm/llvm-project/commit/b0b9126897ed7d0143a2a4b112cb04808d1df00b.diff
LOG: [AArch64] Expand build-vector-extract.ll tests to i8's. NFC
Added:
Modified:
llvm/test/CodeGen/AArch64/build-vector-extract.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/build-vector-extract.ll b/llvm/test/CodeGen/AArch64/build-vector-extract.ll
index a785533e8db9..b57148f2a927 100644
--- a/llvm/test/CodeGen/AArch64/build-vector-extract.ll
+++ b/llvm/test/CodeGen/AArch64/build-vector-extract.ll
@@ -420,6 +420,225 @@ define <2 x i64> @extract3_i16_zext_insert1_i64_zero(<8 x i16> %x) {
ret <2 x i64> %r
}
+; i8
+
+define <2 x i64> @extract0_i8_zext_insert0_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract0_i8_zext_insert0_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[0]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: fmov d0, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 0
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract0_i8_zext_insert0_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract0_i8_zext_insert0_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[0]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[0], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 0
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract1_i8_zext_insert0_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract1_i8_zext_insert0_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[1]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: fmov d0, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 1
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract1_i8_zext_insert0_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract1_i8_zext_insert0_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[1]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[0], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 1
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract2_i8_zext_insert0_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract2_i8_zext_insert0_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[2]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: fmov d0, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 2
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract2_i8_zext_insert0_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract2_i8_zext_insert0_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[2]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[0], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 2
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract3_i8_zext_insert0_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract3_i8_zext_insert0_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[3]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: fmov d0, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 3
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract3_i8_zext_insert0_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract3_i8_zext_insert0_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[3]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[0], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 3
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract0_i8_zext_insert1_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract0_i8_zext_insert1_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[0]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: dup v0.2d, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 0
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract0_i8_zext_insert1_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract0_i8_zext_insert1_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[0]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[1], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 0
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract1_i8_zext_insert1_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract1_i8_zext_insert1_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[1]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: dup v0.2d, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 1
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract1_i8_zext_insert1_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract1_i8_zext_insert1_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[1]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[1], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 1
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract2_i8_zext_insert1_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract2_i8_zext_insert1_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[2]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: dup v0.2d, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 2
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract2_i8_zext_insert1_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract2_i8_zext_insert1_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[2]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[1], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 2
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract3_i8_zext_insert1_i64_undef(<16 x i8> %x) {
+; CHECK-LABEL: extract3_i8_zext_insert1_i64_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[3]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: dup v0.2d, x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 3
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> undef, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @extract3_i8_zext_insert1_i64_zero(<16 x i8> %x) {
+; CHECK-LABEL: extract3_i8_zext_insert1_i64_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umov w8, v0.b[3]
+; CHECK-NEXT: and x8, x8, #0xff
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: mov v0.d[1], x8
+; CHECK-NEXT: ret
+ %e = extractelement <16 x i8> %x, i32 3
+ %z = zext i8 %e to i64
+ %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
+ ret <2 x i64> %r
+}
+
+
; This would crash because we did not expect to create
; a shuffle for a vector where the source operand is
; not the same size as the result.
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