[PATCH] D98599: [AArch64] Zero extended extract_vector_elt pattern
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 14 08:20:52 PDT 2021
dmgreen created this revision.
dmgreen added reviewers: fhahn, efriedma, SjoerdMeijer, NickGuy, t.p.northover.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.
This adds a pattern for i64 zext_inreg(i32 extract_vector_elt X), producing a single UMOVvi16 instruction that is already expected to clear the top bits. The exact pattern that this matches is and(anyext(vector_extract X, lane), 0xff), similar to the sext patterns higher up in the same file.
https://reviews.llvm.org/D98599
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/build-vector-extract.ll
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