[PATCH] D97729: [ARM] Improve WLS lowering

[Dave Green via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGfad70c306854: [ARM] Improve WLS lowering (authored by dmgreen).

Changed prior to commit:
  https://reviews.llvm.org/D97729?vs=329857&id=330006#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97729/new/

https://reviews.llvm.org/D97729

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/CodeGen/HardwareLoops.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMBlockPlacement.cpp
  llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
  llvm/lib/Target/ARM/MVETailPredUtils.h
  llvm/lib/Target/ARM/MVETailPredication.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-default.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize-strd-lr.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-negative-offset.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
  llvm/test/CodeGen/Thumb2/block-placement.mir
  llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
  llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
  llvm/test/CodeGen/Thumb2/mve-postinc-distribute.ll
  llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll
  llvm/test/CodeGen/Thumb2/mve-vmaxnma-commute.ll
  llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll
  llvm/test/Transforms/HardwareLoops/ARM/simple-do.ll
  llvm/test/Transforms/HardwareLoops/ARM/structure.ll
  llvm/test/Transforms/HardwareLoops/loop-guards.ll
  llvm/test/Transforms/HardwareLoops/scalar-while.ll

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