[PATCH] D98356: [MCA] Support in-order CPUs with MicroOpBufferSize=1

[Jay Foad via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG7340fd68862c: [MCA] Support in-order CPUs with MicroOpBufferSize=1 (authored by foad).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98356/new/

https://reviews.llvm.org/D98356

Files:
  llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp
  llvm/test/tools/llvm-mca/AMDGPU/gfx10-add-sequence.s
  llvm/test/tools/llvm-mca/AMDGPU/lit.local.cfg

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