[PATCH] D98250: [RISCV] Optimize INSERT_VECTOR_ELT sequences

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 10 18:00:08 PST 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2250
+    ValLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Val, Zero);
+    ValHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Val, One);
+    if (isa<ConstantSDNode>(Val) &&
----------------
I'm not sure how I feel about creating these extracts that might not get used. Having them here instead of just in the non-simple path only saves us from having to call getConstant where we assign Val = ValLo?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98250/new/

https://reviews.llvm.org/D98250



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