[PATCH] D98221: [AMDGPU] Disable SCC bit on fp atomics

Konstantin Zhuravlyov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 9 15:42:54 PST 2021


kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM, thanks.



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:1222-1224
+def isGFX908orGFX90A :
+  Predicate<"Subtarget->hasMAIInsts()">,
+  AssemblerPredicate<(all_of FeatureMAIInsts)>;
----------------
rampitec wrote:
> kzhuravl wrote:
> > def hasMAIInsts...? as you are not checking any generation in particular.
> There is no FeatureGFX90AInsts, we have FeatureMAIInsts instead.
I think you meant to say that there is no "FeatureGFX908Insts"? FeatureGFX90AInsts exists.


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  https://reviews.llvm.org/D98221/new/

https://reviews.llvm.org/D98221



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