[PATCH] D95677: [AArch64][SVE] Add unpredicated ld1/st1 patterns for reg+reg addressing modes
Bradley Smith via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 10 07:25:11 PST 2021
bsmith updated this revision to Diff 329658.
bsmith added a comment.
- Simplify new addressing mode tests
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95677/new/
https://reviews.llvm.org/D95677
Files:
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-fold-vscale.ll
llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
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