[PATCH] D94816: [P10] [Power PC] Exploiting new load rightmost vector element instructions.

[Amy Kwan via Phabricator via llvm-commits]

amyk accepted this revision as: amyk.
amyk added a comment.
This revision is now accepted and ready to land.

I think this LGTM aside from the minor nit on the test case. I am OK with it being updated on the commit.



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Comment at: llvm/test/CodeGen/PowerPC/load-rightmost-vector-elt.ll:12
+; RUN:     -mcpu=pwr9 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
+; RUN:     < %s | FileCheck %s --check-prefix=CHECK-P9LE
+
----------------
For the P9 run lines, you can probably do just one `CHECK-P9` (or `check-prefixes` if needed?) so we don't have double of the same P9 checks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94816/new/

https://reviews.llvm.org/D94816