[PATCH] D98083: [NFC][AMDGPU] Improve documentation of AMDGPU handling of volatile

Tony Tye via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 8 05:45:51 PST 2021


t-tye added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1704
+
+    // FIXME: Currently LLVM IR marks all atomic operations as volatile. So it
+    // is not possible to tell in LLVM IR if it is a non-volatile atomic, or a
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foad wrote:
> "LLVM IR marks all atomic operations as volatile": no it doesn't. There are plenty of examples in the lit test suite of load atomic / store atomic / atomicrmw both with and without the volatile keyword.
> 
Then maybe it is an issue in the MIR, perhaps limited to AMDGPU memory operands. It needs more investigation to figure out, then this review can be updated one way or another.


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  https://reviews.llvm.org/D98083/new/

https://reviews.llvm.org/D98083



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