[PATCH] D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp:375
+
+  auto *Op0 = I->getOperand(0);
+  auto *Op1 = I->getOperand(1);
----------------
nit: Is this better named as Pg instead of Op0 so it's more obvious that Op1 and Op2 are the integer/FP vector inputs?


================
Comment at: llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp:380
+  // Return true if V is a Constant{Int,Float} with value 1, false otherwise.
+  auto IsUnit = [](auto *V) {
+    if (auto *ConstantIntV = dyn_cast<ConstantInt>(V))
----------------
I think it would be good to make use of existing match functions if possible, i.e.:

  return match(V, m_FPOne()) || match(V, m_One());



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98033/new/

https://reviews.llvm.org/D98033