[PATCH] D98152: [InstCombine] Canonicalize SPF to min/max intrinsics

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 7 13:56:47 PST 2021


nikic added inline comments.


================
Comment at: llvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll:24
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[T15]], i32 0)
+; CHECK-NEXT:    [[T12:%.*]] = add i32 [[TMP1]], [[A]]
 ; CHECK-NEXT:    ret i32 [[T12]]
----------------
Not clear to me whether these are regressions or not. Depends on how much we prefer to have min/max over other select structures.


================
Comment at: llvm/test/Transforms/InstCombine/adjust-for-minmax.ll:250
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT:    ret i64 [[TMP2]]
 ;
----------------
We explicitly fold min/max to work on the narrower type, so I'm counting these as improvements.


================
Comment at: llvm/test/Transforms/InstCombine/div-shift.ll:66
+; CHECK-NEXT:    [[TMP3:%.*]] = udiv i32 [[X:%.*]], [[TMP2]]
+; CHECK-NEXT:    ret i32 [[TMP3]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/max-of-nots.ll:9
+; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[NOTX]], <2 x i32> [[NOTY]])
+; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/max_known_bits.ll:40
+; CHECK-NEXT:    [[TMP2:%.*]] = call i16 @llvm.smax.i16(i16 [[TMP1]], i16 -2048)
+; CHECK-NEXT:    [[E:%.*]] = add i16 [[TMP2]], 1
 ; CHECK-NEXT:    ret i16 [[E]]
----------------
Regression (missing nsw flag)


================
Comment at: llvm/test/Transforms/InstCombine/min-positive.ll:11
+; CHECK-NEXT:    [[TEST:%.*]] = icmp sgt i32 [[TMP1]], 0
 ; CHECK-NEXT:    ret i1 [[TEST]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/minmax-demandbits.ll:8
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 31)
+; CHECK-NEXT:    [[X:%.*]] = and i32 [[TMP1]], -32
 ; CHECK-NEXT:    ret i32 [[X]]
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/minmax-fold.ll:283
+; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 11)
+; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/minmax-fold.ll:739
+; CHECK-NEXT:    [[TMP3:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT:    ret i32 [[TMP3]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/minmax-fold.ll:887
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
----------------
This looks neutral.


================
Comment at: llvm/test/Transforms/InstCombine/minmax-fold.ll:1103
+; CHECK-NEXT:    [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT:    ret i8 [[R]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/minmax-fold.ll:1351
+; CHECK-NEXT:    [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT:    ret i8 [[R]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/sadd_sat.ll:15
+; CHECK-NEXT:    [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[CONV7]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/InstCombine/sub-minmax.ll:23
+; CHECK-NEXT:    [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT:    ret i32 [[X]]
 ;
----------------
Regression


================
Comment at: llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll:153
+; CHECK-NEXT:    [[TMP6:%.*]] = tail call i32 @llvm.smin.i32(i32 [[TMP5]], i32 [[TMP4]])
+; CHECK-NEXT:    ret i32 [[TMP6]]
 ;
----------------
No longer vectorized?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98152/new/

https://reviews.llvm.org/D98152



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