[llvm] 2d922de - [MC][RISCV] Support .reloc *, BFD_RELOC_{NONE, 32, 64}, *

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2021-03-05T21:45:11-08:00
New Revision: 2d922de3af40a5d6c0f62d7d3adbbf64adaadbd5

URL: https://github.com/llvm/llvm-project/commit/2d922de3af40a5d6c0f62d7d3adbbf64adaadbd5
DIFF: https://github.com/llvm/llvm-project/commit/2d922de3af40a5d6c0f62d7d3adbbf64adaadbd5.diff

LOG: [MC][RISCV] Support .reloc *, BFD_RELOC_{NONE,32,64}, *

BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
    llvm/test/MC/RISCV/reloc-directive.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index bb1f1cc7f49a..69f6ee460298 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -30,6 +30,9 @@ Optional<MCFixupKind> RISCVAsmBackend::getFixupKind(StringRef Name) const {
 #define ELF_RELOC(X, Y) .Case(#X, Y)
 #include "llvm/BinaryFormat/ELFRelocs/RISCV.def"
 #undef ELF_RELOC
+               .Case("BFD_RELOC_NONE", ELF::R_RISCV_NONE)
+               .Case("BFD_RELOC_32", ELF::R_RISCV_32)
+               .Case("BFD_RELOC_64", ELF::R_RISCV_64)
                .Default(-1u);
     if (Type != -1u)
       return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);

diff  --git a/llvm/test/MC/RISCV/reloc-directive.s b/llvm/test/MC/RISCV/reloc-directive.s
index d025a64243f5..98c0efd06b44 100644
--- a/llvm/test/MC/RISCV/reloc-directive.s
+++ b/llvm/test/MC/RISCV/reloc-directive.s
@@ -9,6 +9,9 @@
 # PRINT: .reloc 0, R_RISCV_32, .data+2
 # PRINT: .reloc 0, R_RISCV_SET32, foo+3
 # PRINT: .reloc 0, R_RISCV_32_PCREL, 5
+# PRINT:      .reloc 0, BFD_RELOC_NONE, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_32, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_64, 9
 
 # CHECK:      0x8 R_RISCV_NONE .data 0x0
 # CHECK-NEXT: 0x4 R_RISCV_NONE foo 0x4
@@ -16,6 +19,9 @@
 # CHECK-NEXT: 0x0 R_RISCV_32 .data 0x2
 # CHECK-NEXT: 0x0 R_RISCV_SET32 foo 0x3
 # CHECK-NEXT: 0x0 R_RISCV_32_PCREL - 0x5
+# CHECK-NEXT: 0x0 R_RISCV_NONE - 0x9
+# CHECK-NEXT: 0x0 R_RISCV_32 - 0x9
+# CHECK-NEXT: 0x0 R_RISCV_64 - 0x9
 .text
   ret
   nop
@@ -28,6 +34,10 @@
   .reloc 0, R_RISCV_SET32, foo+3
   .reloc 0, R_RISCV_32_PCREL, 5
 
+  .reloc 0, BFD_RELOC_NONE, 9
+  .reloc 0, BFD_RELOC_32, 9
+  .reloc 0, BFD_RELOC_64, 9
+
 .data
 .globl foo
 foo: