[llvm] 59ff931 - [MC][ARM] Support .reloc *, BFD_RELOC_{NONE, 8, 16, 32}, *
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 5 21:39:20 PST 2021
Author: Fangrui Song
Date: 2021-03-05T21:39:16-08:00
New Revision: 59ff9315fda55c274e80393c2c8db99cb856f4fc
URL: https://github.com/llvm/llvm-project/commit/59ff9315fda55c274e80393c2c8db99cb856f4fc
DIFF: https://github.com/llvm/llvm-project/commit/59ff9315fda55c274e80393c2c8db99cb856f4fc.diff
LOG: [MC][ARM] Support .reloc *, BFD_RELOC_{NONE,8,16,32}, *
BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.
Added:
Modified:
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/test/MC/ARM/reloc-directive.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index b02aef3c338b..e272adc7435e 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -55,6 +55,10 @@ Optional<MCFixupKind> ARMAsmBackend::getFixupKind(StringRef Name) const {
#define ELF_RELOC(X, Y) .Case(#X, Y)
#include "llvm/BinaryFormat/ELFRelocs/ARM.def"
#undef ELF_RELOC
+ .Case("BFD_RELOC_NONE", ELF::R_ARM_NONE)
+ .Case("BFD_RELOC_8", ELF::R_ARM_ABS8)
+ .Case("BFD_RELOC_16", ELF::R_ARM_ABS16)
+ .Case("BFD_RELOC_32", ELF::R_ARM_ABS32)
.Default(-1u);
if (Type == -1u)
return None;
diff --git a/llvm/test/MC/ARM/reloc-directive.s b/llvm/test/MC/ARM/reloc-directive.s
index 3a2cd85ecd2c..682f0e1185c7 100644
--- a/llvm/test/MC/ARM/reloc-directive.s
+++ b/llvm/test/MC/ARM/reloc-directive.s
@@ -21,6 +21,11 @@
.reloc 0, R_ARM_LDR_PC_G0, foo+3
.reloc 0, R_ARM_THM_ALU_PREL_11_0, 5
+ .reloc 0, BFD_RELOC_NONE, 9
+ .reloc 0, BFD_RELOC_8, 9
+ .reloc 0, BFD_RELOC_16, 9
+ .reloc 0, BFD_RELOC_32, 9
+
.data
.globl foo
foo:
@@ -34,6 +39,10 @@ foo:
# PRINT: .reloc 0, R_ARM_ALU_PC_G0, .data+2
# PRINT: .reloc 0, R_ARM_LDR_PC_G0, foo+3
# PRINT: .reloc 0, R_ARM_THM_ALU_PREL_11_0, 5
+# PRINT: .reloc 0, BFD_RELOC_NONE, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_8, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_16, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_32, 9
# ARM relocations use the Elf32_Rel format. Addends are neither stored in the
# relocation entries nor applied in the referenced locations.
@@ -43,5 +52,9 @@ foo:
# CHECK-NEXT: 0x0 R_ARM_ALU_PC_G0 .data
# CHECK-NEXT: 0x0 R_ARM_LDR_PC_G0 foo
# CHECK-NEXT: 0x0 R_ARM_THM_ALU_PREL_11_0 -
+# CHECK-NEXT: 0x0 R_ARM_NONE -
+# CHECK-NEXT: 0x0 R_ARM_ABS8 -
+# CHECK-NEXT: 0x0 R_ARM_ABS16 -
+# CHECK-NEXT: 0x0 R_ARM_ABS32 -
# HEX: 0x00000000 00000000 00000000
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