[PATCH] D98101: [RISCV] Enable the LocalStackSlotAllocation pass support

[luxufan via Phabricator via llvm-commits]

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For RISC-V, load/store(exclude vector load/store) instructions only has a 12 bit immediate operand. If the offset is out-of-range, it must make use of a temp register to make up this offset. If between these offsets, they have a small
(IsInt<12>) relative offset, LocalStackSlotAllocation pass can find a value as frame base register's value, and replace the origin offset with this register's value plus the relative offset.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98101

Files:
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.h
  llvm/test/CodeGen/RISCV/local-stack-allocation.ll

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