[llvm] 3110187 - [MC][PowerPC] Support .reloc *, BFD_RELOC_{NONE, 16, 32, 64}, *

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2021-03-05T21:31:45-08:00
New Revision: 3110187f1f1fe5ff755512999ace033abeb76095

URL: https://github.com/llvm/llvm-project/commit/3110187f1f1fe5ff755512999ace033abeb76095
DIFF: https://github.com/llvm/llvm-project/commit/3110187f1f1fe5ff755512999ace033abeb76095.diff

LOG: [MC][PowerPC] Support .reloc *, BFD_RELOC_{NONE,16,32,64}, *

BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
    llvm/test/MC/PowerPC/ppc32-reloc-directive.s
    llvm/test/MC/PowerPC/ppc64-reloc-directive.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index 72401668c8d0..28294b4c00ed 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -247,12 +247,19 @@ Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
 #define ELF_RELOC(X, Y) .Case(#X, Y)
 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
 #undef ELF_RELOC
+                 .Case("BFD_RELOC_NONE", ELF::R_PPC64_NONE)
+                 .Case("BFD_RELOC_16", ELF::R_PPC64_ADDR16)
+                 .Case("BFD_RELOC_32", ELF::R_PPC64_ADDR32)
+                 .Case("BFD_RELOC_64", ELF::R_PPC64_ADDR64)
                  .Default(-1u);
     } else {
       Type = llvm::StringSwitch<unsigned>(Name)
 #define ELF_RELOC(X, Y) .Case(#X, Y)
 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
 #undef ELF_RELOC
+                 .Case("BFD_RELOC_NONE", ELF::R_PPC_NONE)
+                 .Case("BFD_RELOC_16", ELF::R_PPC_ADDR16)
+                 .Case("BFD_RELOC_32", ELF::R_PPC_ADDR32)
                  .Default(-1u);
     }
     if (Type != -1u)

diff  --git a/llvm/test/MC/PowerPC/ppc32-reloc-directive.s b/llvm/test/MC/PowerPC/ppc32-reloc-directive.s
index b63e4c91eb08..3eb6c2964c85 100644
--- a/llvm/test/MC/PowerPC/ppc32-reloc-directive.s
+++ b/llvm/test/MC/PowerPC/ppc32-reloc-directive.s
@@ -8,6 +8,9 @@
 # PRINT: .reloc 0, R_PPC_ADDR32, .data+2
 # PRINT: .reloc 0, R_PPC_REL16_HI, foo+3
 # PRINT: .reloc 0, R_PPC_REL16_HA, 5
+# PRINT: .reloc 0, BFD_RELOC_NONE, 9
+# PRINT: .reloc 0, BFD_RELOC_16, 9
+# PRINT: .reloc 0, BFD_RELOC_32, 9
 
 # CHECK:      0x8 R_PPC_NONE .data 0x0
 # CHECK-NEXT: 0x4 R_PPC_NONE foo 0x4
@@ -15,6 +18,9 @@
 # CHECK-NEXT: 0x0 R_PPC_ADDR32 .data 0x2
 # CHECK-NEXT: 0x0 R_PPC_REL16_HI foo 0x3
 # CHECK-NEXT: 0x0 R_PPC_REL16_HA - 0x5
+# CHECK-NEXT: 0x0 R_PPC_NONE - 0x9
+# CHECK-NEXT: 0x0 R_PPC_ADDR16 - 0x9
+# CHECK-NEXT: 0x0 R_PPC_ADDR32 - 0x9
 
 .text
   blr
@@ -27,6 +33,10 @@
   .reloc 0, R_PPC_REL16_HI, foo+3
   .reloc 0, R_PPC_REL16_HA, 5
 
+  .reloc 0, BFD_RELOC_NONE, 9
+  .reloc 0, BFD_RELOC_16, 9
+  .reloc 0, BFD_RELOC_32, 9
+
 .data
 .globl foo
 foo:

diff  --git a/llvm/test/MC/PowerPC/ppc64-reloc-directive.s b/llvm/test/MC/PowerPC/ppc64-reloc-directive.s
index e683dbeb7597..5f54ac73bcf1 100644
--- a/llvm/test/MC/PowerPC/ppc64-reloc-directive.s
+++ b/llvm/test/MC/PowerPC/ppc64-reloc-directive.s
@@ -10,6 +10,10 @@
 # PRINT: .reloc 0, R_PPC64_ADDR32, .data+2
 # PRINT: .reloc 0, R_PPC64_REL16_HI, foo+3
 # PRINT: .reloc 0, R_PPC64_REL16_HA, 5
+# PRINT: .reloc 0, BFD_RELOC_NONE, 9
+# PRINT: .reloc 0, BFD_RELOC_16, 9
+# PRINT: .reloc 0, BFD_RELOC_32, 9
+# PRINT: .reloc 0, BFD_RELOC_64, 9
 
 # CHECK:      0x8 R_PPC64_NONE .data 0x0
 # CHECK-NEXT: 0x4 R_PPC64_NONE foo 0x4
@@ -17,6 +21,10 @@
 # CHECK-NEXT: 0x0 R_PPC64_ADDR32 .data 0x2
 # CHECK-NEXT: 0x0 R_PPC64_REL16_HI foo 0x3
 # CHECK-NEXT: 0x0 R_PPC64_REL16_HA - 0x5
+# CHECK-NEXT: 0x0 R_PPC64_NONE - 0x9
+# CHECK-NEXT: 0x0 R_PPC64_ADDR16 - 0x9
+# CHECK-NEXT: 0x0 R_PPC64_ADDR32 - 0x9
+# CHECK-NEXT: 0x0 R_PPC64_ADDR64 - 0x9
 
 .text
   blr
@@ -29,6 +37,11 @@
   .reloc 0, R_PPC64_REL16_HI, foo+3
   .reloc 0, R_PPC64_REL16_HA, 5
 
+  .reloc 0, BFD_RELOC_NONE, 9
+  .reloc 0, BFD_RELOC_16, 9
+  .reloc 0, BFD_RELOC_32, 9
+  .reloc 0, BFD_RELOC_64, 9
+
 .data
 .globl foo
 foo: