[PATCH] D98031: [ARM] Add an optimization to avoid S-register forwarding hazards

[Andrew Savonichev via Phabricator via llvm-commits]

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Register forwarding hazards might occur when one uop reads a D- or
Q-register operand that has recently been written with one or more
S-register results. This happens only in AArch32 state on Cortex-A57,
Cortex-A72, Cortex-A77 (and probably other processors as well).

The pass replaces S-registers writes with the corresponding scalar
writes to D-registers. If there is no suitable replacement, an
S-register is copied to a D-register scalar via a core register.

The pass is disabled by default and it can be enabled by
-arm-subreg-write LLVM option when non-zero optimization level is set.

With this optimization, llvm-test-suite/MultiSource/Benchmarks/Bullet
shows ~10% performance improvement on Cortex-A72.

The pass has also been tested on Skia library. Skia's nanobench shows
~1.3% geomean improvement and ~10% improvement for some subtests on
Cortex-A72.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98031

Files:
  llvm/lib/Target/ARM/ARM.h
  llvm/lib/Target/ARM/ARMSubregWrite.cpp
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/ARM/CMakeLists.txt
  llvm/test/CodeGen/ARM/arm-subreg-write.ll

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