[PATCH] D97948: [AIX][TLS] Generate 32-bit general-dynamic access code sequence

David Tenty via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 4 07:43:17 PST 2021


daltenty added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll:361
+
+attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }
+
----------------
Do we need all these attributes for the test? Likewise, we need to cleanup the flags and identifiers below.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll:361
+
+attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }
+
----------------
ditto previous comment


================
Comment at: llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll:457
+
+attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }
+
----------------
ditto previous comment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97948/new/

https://reviews.llvm.org/D97948



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