[PATCH] D97948: [AIX][TLS] Generate 32-bit general-dynamic access code sequence

[Lei Huang via Phabricator via llvm-commits]

lei created this revision.
lei added reviewers: stefanp, nemanjai, sfertile, daltenty, power-llvm-team.
Herald added a subscriber: hiraditya.
lei requested review of this revision.
Herald added a project: LLVM.

Adds support for the TLS general dynamic access model to
assembly files on AIX 32-bit.

To generate the correct code sequence when accessing a TLS variable
`v`, we first create two TOC entry nodes, one for the variable offset, one
for the region handle. These nodes are followed by a `PPCISD::TLSGD_AIX`
node (new node introduced by this patch).
The `PPCISD::TLSGD_AIX` node (`TLSGDAIX` pseudo instruction) is
expanded to 2 copies (to put the variable offset and region handle in
the right registers) and a call to `__tls_get_addr`.

This patch also changes the way TC entries are generated in asm files.
If the generated TC entry is for the region handle of a TLS variable,
we add the `@m` relocation and the `.` prefix to the entry name.
For example:

  L..C0:
    .tc .v[TC],v[TL]@m -> region handle
  L..C1:
    .tc v[TC],v[TL] -> variable offset


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97948

Files:
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
  llvm/lib/Target/PowerPC/PPCTargetStreamer.h
  llvm/test/CodeGen/PowerPC/aix-tls-checks.ll
  llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
  llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
  llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll

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