[PATCH] D97485: PowerPC][AIX] Handle variadic vector formal arguments.
Sean Fertile via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 2 08:31:48 PST 2021
sfertile updated this revision to Diff 327466.
sfertile added a comment.
- Converted loop to explicit handling of custom RegLocs
- Added const on member function.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97485/new/
https://reviews.llvm.org/D97485
Files:
llvm/lib/Target/PowerPC/PPCCCState.h
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll
llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
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