[PATCH] D97762: [RISCV] fixes cross unwinding failure

[kamlesh kumar via Phabricator via llvm-commits]

kamleshbhalui created this revision.
kamleshbhalui added reviewers: compnerd, MaskRay, luismarques, bkramer.
kamleshbhalui added a project: libunwind.
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Herald added a reviewer: libunwind.
kamleshbhalui requested review of this revision.
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https://reviews.llvm.org/D80690 This introduced build failure when LIBUNWIND_ENABLE_CROSS_UNWINDING enabled.
This patch fixes that.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97762

Files:
  libunwind/src/Registers.hpp


Index: libunwind/src/Registers.hpp
===================================================================
--- libunwind/src/Registers.hpp
+++ libunwind/src/Registers.hpp
@@ -3731,26 +3731,35 @@
 /// Registers_riscv holds the register state of a thread in a RISC-V
 /// process.
 
-# if __riscv_xlen == 32
+// This check makes it safe when LIBUNWIND_ENABLE_CROSS_UNWINDING enabled.
+# ifdef __riscv
+#  if __riscv_xlen == 32
 typedef uint32_t reg_t;
-# elif __riscv_xlen == 64
+#  elif __riscv_xlen == 64
 typedef uint64_t reg_t;
-# else
-#  error "Unsupported __riscv_xlen"
-# endif
+#  else
+#   error "Unsupported __riscv_xlen"
+#  endif
 
-# if defined(__riscv_flen)
-#  if __riscv_flen == 64
+#  if defined(__riscv_flen)
+#   if __riscv_flen == 64
 typedef double fp_t;
-#  elif __riscv_flen == 32
+#   elif __riscv_flen == 32
 typedef float fp_t;
+#   else
+#    error "Unsupported __riscv_flen"
+#   endif
 #  else
-#   error "Unsupported __riscv_flen"
+// This is just for supressing undeclared error of fp_t.
+typedef double fp_t;
 #  endif
 # else
-// This is just for supressing undeclared error of fp_t.
+// Use Max possible width when cross unwinding
+typedef uint64_t reg_t;
 typedef double fp_t;
-# endif
+# define __riscv_xlen 64
+# define __riscv_flen 64
+#endif
 
 /// Registers_riscv holds the register state of a thread.
 class _LIBUNWIND_HIDDEN Registers_riscv {


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