[PATCH] D97634: [DAGCombiner] Optimize 1-bit smulo to AND+SETNE.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.
Herald added subscribers: ecnelises, pengfei, hiraditya.
craig.topper requested review of this revision.
Herald added a project: LLVM.

A 1-bit smulo overflows is both inputs are -1 since the result
should be +1 which can't be represented in a signed 1 bit value.

We can detect this with an AND and a setcc. The multiply result
can also use the same AND.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97634

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/vec_smulo.ll

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