[PATCH] D97545: [AMDGPU] Remove SI_MASK_BRANCH

Ruiling, Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 26 06:28:29 PST 2021


ruiling updated this revision to Diff 326678.
ruiling added a comment.

I find it is not a good idea to remove the tests. So I adjust the lit-test to make sure RemoveShortExecBranches works correctly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97545/new/

https://reviews.llvm.org/D97545

Files:
  llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
  llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
  llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
  llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
  llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
  llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
  llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir
  llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
  llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
  llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
  llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
  llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
  llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
  llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
  llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
  llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
  llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir

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