[PATCH] D94163: [RISCV] Set dependency on floating point CSRs, 1/3
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 26 02:35:56 PST 2021
sepavloff updated this revision to Diff 326636.
sepavloff added a comment.
Reduced number of instruction variants from 3 to 2 (generic and default)
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94163/new/
https://reviews.llvm.org/D94163
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoD.td
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
llvm/lib/Target/RISCV/RISCVRegisterInfo.td
llvm/test/CodeGen/RISCV/double-arith.ll
llvm/test/CodeGen/RISCV/float-arith.ll
llvm/test/CodeGen/RISCV/half-arith.ll
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