[PATCH] D96980: [amdgpu] Revert agnostic SGPR spill.

Ruiling, Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 25 18:46:40 PST 2021


ruiling added a comment.

> Yes. The MIR doesn't track divergent predecessors and we don't have any verification for this

Could you explain a little bit more? do you mean a transformation that may merge/duplicate blocks so that predecessor changed? What kind of verification do you think is needed to catch the problem in your mind?


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