[llvm] daf7d7f - [AArch64][GlobalISel] Correct function evaluation order in applyINS

[Jessica Paquette via llvm-commits]

Author: Jessica Paquette
Date: 2021-02-23T16:21:11-08:00
New Revision: daf7d7f0dc283873f40f3500b20f02bc2cde701d

URL: https://github.com/llvm/llvm-project/commit/daf7d7f0dc283873f40f3500b20f02bc2cde701d
DIFF: https://github.com/llvm/llvm-project/commit/daf7d7f0dc283873f40f3500b20f02bc2cde701d.diff

LOG: [AArch64][GlobalISel] Correct function evaluation order in applyINS

The order in which the nested calls to Builder.buildWhatever are
evaluated in differs between GCC and Clang.

This caused a bot failure because the MIR in the testcase was
coming out in a different order than expected.

Rather than using nested calls, pull them out in order to fix the
order of evaluation.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 1eba6552b808..3e059832f0a6 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -456,11 +456,10 @@ static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI,
   Register DstVec, SrcVec;
   int DstLane, SrcLane;
   std::tie(DstVec, DstLane, SrcVec, SrcLane) = MatchInfo;
-  Builder.buildInsertVectorElement(
-      Dst, DstVec,
-      Builder.buildExtractVectorElement(
-          ScalarTy, SrcVec, Builder.buildConstant(LLT::scalar(64), SrcLane)),
-      Builder.buildConstant(LLT::scalar(64), DstLane));
+  auto SrcCst = Builder.buildConstant(LLT::scalar(64), SrcLane);
+  auto Extract = Builder.buildExtractVectorElement(ScalarTy, SrcVec, SrcCst);
+  auto DstCst = Builder.buildConstant(LLT::scalar(64), DstLane);
+  Builder.buildInsertVectorElement(Dst, DstVec, Extract, DstCst);
   MI.eraseFromParent();
   return true;
 }