[llvm] 1020d16 - [InstSimplify] Handle nsw shl -> poison patterns
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 23 10:27:03 PST 2021
Author: Simon Pilgrim
Date: 2021-02-23T18:26:56Z
New Revision: 1020d161565df48ec454509724e60ab8fbbdfd66
URL: https://github.com/llvm/llvm-project/commit/1020d161565df48ec454509724e60ab8fbbdfd66
DIFF: https://github.com/llvm/llvm-project/commit/1020d161565df48ec454509724e60ab8fbbdfd66.diff
LOG: [InstSimplify] Handle nsw shl -> poison patterns
Pulled out from D90479 - this recognises invalid nsw shl patterns with signbit changes that result in poison.
Differential Revision: https://reviews.llvm.org/D97305
Added:
Modified:
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstCombine/known-signbit-shift.ll
llvm/test/Transforms/InstSimplify/icmp-constant.ll
Removed:
################################################################################
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 814881da3c3a..c7c0290cbbf0 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -1228,7 +1228,8 @@ static bool isPoisonShift(Value *Amount, const SimplifyQuery &Q) {
/// Given operands for an Shl, LShr or AShr, see if we can fold the result.
/// If not, this returns null.
static Value *SimplifyShift(Instruction::BinaryOps Opcode, Value *Op0,
- Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) {
+ Value *Op1, bool IsNSW, const SimplifyQuery &Q,
+ unsigned MaxRecurse) {
if (Constant *C = foldOrCommuteConstant(Opcode, Op0, Op1, Q))
return C;
@@ -1272,6 +1273,21 @@ static Value *SimplifyShift(Instruction::BinaryOps Opcode, Value *Op0,
if (KnownAmt.countMinTrailingZeros() >= NumValidShiftBits)
return Op0;
+ // Check for nsw shl leading to a poison value.
+ if (IsNSW) {
+ assert(Opcode == Instruction::Shl && "Expected shl for nsw instruction");
+ KnownBits KnownVal = computeKnownBits(Op0, Q.DL, 0, Q.AC, Q.CxtI, Q.DT);
+ KnownBits KnownShl = KnownBits::shl(KnownVal, KnownAmt);
+
+ if (KnownVal.Zero.isSignBitSet())
+ KnownShl.Zero.setSignBit();
+ if (KnownVal.One.isSignBitSet())
+ KnownShl.One.setSignBit();
+
+ if (KnownShl.hasConflict())
+ return PoisonValue::get(Op0->getType());
+ }
+
return nullptr;
}
@@ -1280,7 +1296,8 @@ static Value *SimplifyShift(Instruction::BinaryOps Opcode, Value *Op0,
static Value *SimplifyRightShift(Instruction::BinaryOps Opcode, Value *Op0,
Value *Op1, bool isExact, const SimplifyQuery &Q,
unsigned MaxRecurse) {
- if (Value *V = SimplifyShift(Opcode, Op0, Op1, Q, MaxRecurse))
+ if (Value *V =
+ SimplifyShift(Opcode, Op0, Op1, /*IsNSW*/ false, Q, MaxRecurse))
return V;
// X >> X -> 0
@@ -1306,7 +1323,8 @@ static Value *SimplifyRightShift(Instruction::BinaryOps Opcode, Value *Op0,
/// If not, this returns null.
static Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
const SimplifyQuery &Q, unsigned MaxRecurse) {
- if (Value *V = SimplifyShift(Instruction::Shl, Op0, Op1, Q, MaxRecurse))
+ if (Value *V =
+ SimplifyShift(Instruction::Shl, Op0, Op1, isNSW, Q, MaxRecurse))
return V;
// undef << X -> 0
diff --git a/llvm/test/Transforms/InstCombine/known-signbit-shift.ll b/llvm/test/Transforms/InstCombine/known-signbit-shift.ll
index f189cbead6de..e758d670e3bc 100644
--- a/llvm/test/Transforms/InstCombine/known-signbit-shift.ll
+++ b/llvm/test/Transforms/InstCombine/known-signbit-shift.ll
@@ -31,7 +31,7 @@ define i1 @test_shift_negative(i32 %a, i32 %b) {
; This test should not crash opt. The shift produces poison.
define i32 @test_no_sign_bit_conflict1(i1 %b) {
; CHECK-LABEL: @test_no_sign_bit_conflict1(
-; CHECK-NEXT: ret i32 undef
+; CHECK-NEXT: ret i32 poison
;
%sel = select i1 %b, i32 8193, i32 8192
%mul = shl nsw i32 %sel, 18
@@ -42,7 +42,7 @@ define i32 @test_no_sign_bit_conflict1(i1 %b) {
; This test should not crash opt. The shift produces poison.
define i32 @test_no_sign_bit_conflict2(i1 %b) {
; CHECK-LABEL: @test_no_sign_bit_conflict2(
-; CHECK-NEXT: ret i32 undef
+; CHECK-NEXT: ret i32 poison
;
%sel = select i1 %b, i32 -8193, i32 -8194
%mul = shl nsw i32 %sel, 18
diff --git a/llvm/test/Transforms/InstSimplify/icmp-constant.ll b/llvm/test/Transforms/InstSimplify/icmp-constant.ll
index cb3818c16df8..f8d5bdc89ceb 100644
--- a/llvm/test/Transforms/InstSimplify/icmp-constant.ll
+++ b/llvm/test/Transforms/InstSimplify/icmp-constant.ll
@@ -772,7 +772,7 @@ define <2 x i1> @add_nsw_pos_const5_splat_vec(<2 x i32> %x) {
define i1 @ne_shl_by_constant_produces_poison(i8 %x) {
; CHECK-LABEL: @ne_shl_by_constant_produces_poison(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: ret i1 poison
;
%zx = zext i8 %x to i16 ; zx = 0x00xx
%xor = xor i16 %zx, 32767 ; xor = 0x7fyy
@@ -784,7 +784,7 @@ define i1 @ne_shl_by_constant_produces_poison(i8 %x) {
define i1 @eq_shl_by_constant_produces_poison(i8 %x) {
; CHECK-LABEL: @eq_shl_by_constant_produces_poison(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: ret i1 poison
;
%clear_high_bit = and i8 %x, 127 ; 0x7f
%set_next_high_bits = or i8 %clear_high_bit, 112 ; 0x70
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