[PATCH] D97111: [RISCV] change rvv frame layout

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:652
+      // |--------------------------| --          |-- MFI.getStackSize()
+      // | realignment              | |           |
+      // |--------------------------| --          |
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In the drawing, can you put `realignment` between `callee-saved registers` and `RVV objects`?

Once we realign `sp` / `bp` as needed, we lay out the stack as if nothing happened, so the realignment if any, would act as padding below the RVV objects. As it stands now, it looks like the padding is between the scalars and the RVV objects, but this should not be the case given that the realignment is an unknown magnitude (hence the need to keep `fp` around)

I understand this means that `MFI.getStackSize()` does not account the realignment (it can't as it is unknown), perhaps we could state this somehow in the drawings? What do you think?


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:665
+      // |--------------------------| --          |-- MFI.getStackSize()
+      // | realignment              | |           |
+      // |--------------------------| --          |
----------------
Ditto: `realignment` goes between `callee-saved registers` and `RVV objects`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97111/new/

https://reviews.llvm.org/D97111