[PATCH] D97236: [MC][ARM] add .w suffixes for BL (T1) and DBG

Nick Desaulniers via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 22 15:25:38 PST 2021


nickdesaulniers created this revision.
nickdesaulniers added reviewers: DavidSpickett, rengolin.
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F1 <https://reviews.llvm.org/F1>.2 Standard assembler syntax fields
describes .w and .n suffixes for wide and narrow encodings.

arch/arm/probes/kprobes/test-thumb.c tests installing kprobes for
certain instructions using inline asm.  There's a few instructions we
fail to assemble due to missing .w t2InstAliases.

Adds .w suffixes for:

- bl  (F5.1.25 BL, BLX (immediate) T1)
- dbg (F5.1.42 DBG T1)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97236

Files:
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/test/MC/ARM/basic-thumb2-instructions.s
  llvm/test/MC/ARM/thumb2-branches.s


Index: llvm/test/MC/ARM/thumb2-branches.s
===================================================================
--- llvm/test/MC/ARM/thumb2-branches.s
+++ llvm/test/MC/ARM/thumb2-branches.s
@@ -92,11 +92,15 @@
 @ unconditional branches accept wide suffix and encode to wide encodings
 @------------------------------------------------------------------------------
 
+foo:
+         bl.w     foo
          bmi.w    #-256
          bne.w    #254
          blt.w    #-1048576
          bge.w    #1048574
 
+@ CHECK: bl	foo                     @ encoding: [A,0xf0'A',A,0xd0'A']
+@ CHECK-NEXT: @   fixup A - offset: 0, value: foo, kind: fixup_arm_thumb_bl
 @ CHECK: bmi.w	#-256                   @ encoding: [0x3f,0xf5,0x80,0xaf]
 @ CHECK: bne.w	#254                    @ encoding: [0x40,0xf0,0x7f,0x80]
 @ CHECK: blt.w	#-1048576               @ encoding: [0xc0,0xf6,0x00,0x80]
Index: llvm/test/MC/ARM/basic-thumb2-instructions.s
===================================================================
--- llvm/test/MC/ARM/basic-thumb2-instructions.s
+++ llvm/test/MC/ARM/basic-thumb2-instructions.s
@@ -647,10 +647,12 @@
         dbg #5
         dbg #0
         dbg #15
+        dbg.w #0
 
 @ CHECK: dbg	#5                      @ encoding: [0xaf,0xf3,0xf5,0x80]
 @ CHECK: dbg	#0                      @ encoding: [0xaf,0xf3,0xf0,0x80]
 @ CHECK: dbg	#15                     @ encoding: [0xaf,0xf3,0xff,0x80]
+@ CHECK: dbg	#0                      @ encoding: [0xaf,0xf3,0xf0,0x80]
 
 
 @------------------------------------------------------------------------------
Index: llvm/lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -3950,6 +3950,8 @@
   let Inst{15-0} = 0b1000111100000000;
 }
 
+def : t2InstAlias<"bl${p}.w $func", (tBL pred:$p, thumb_bl_target:$func), 0>;
+
 // Compare and branch on zero / non-zero
 let isBranch = 1, isTerminator = 1 in {
   def tCBZ  : T1I<(outs), (ins tGPR:$Rn, thumb_cb_target:$target), IIC_Br,
@@ -4047,6 +4049,7 @@
   let Inst{7-4} = 0b1111;
   let Inst{3-0} = opt;
 }
+def : t2InstAlias<"dbg${p}.w $opt", (t2DBG imm0_15:$opt, pred:$p), 0>;
 
 // Secure Monitor Call is a system instruction.
 // Option = Inst{19-16}


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