[PATCH] D94264: [GlobalISel] Add MachineInstNumbering to CSEInfo and propagate CSE throughout AArch64 pipeline.

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 22 14:02:53 PST 2021


aemerson added a comment.

In D94264#2579954 <https://reviews.llvm.org/D94264#2579954>, @arsenm wrote:

> I think legalizing/combining will do way, way more insertions than would happen in regalloc. Is this losing time to renumberings?

On average, this does cost more in renumbering/flushing than it saves. It only provides a net benefit on the pathological cases in translation & localization.

In D94264#2579954 <https://reviews.llvm.org/D94264#2579954>, @arsenm wrote:

> Would it make sense to increase the increment size?

What do you mean by increment size?

In D94264#2579294 <https://reviews.llvm.org/D94264#2579294>, @tschuett wrote:

> Could you split large basic blocks into smaller ones?

The issue does get resolved if we keep the constants entry block separate after IR translation, instead of merging them. However @qcolombet believes that's not the right approach.


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