[PATCH] D94264: [GlobalISel] Add MachineInstNumbering to CSEInfo and propagate CSE throughout AArch64 pipeline.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

I think legalizing/combining will do way, way more insertions than would happen in regalloc. Is this losing time to renumberings? Would it make sense to increase the increment size?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D94264/new/

https://reviews.llvm.org/D94264