[PATCH] D97097: [RISCV] Custom isel the rest of the vector load/store intrinsics.

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1aeb927fedbe: [RISCV] Custom isel the rest of the vector load/store intrinsics. (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D97097?vs=325142&id=325478#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97097/new/

https://reviews.llvm.org/D97097

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

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