[PATCH] D96492: [AVR] Add register aliases XL, YH, etc

[Ben Shi via Phabricator via llvm-commits]

benshi001 added inline comments.


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Comment at: llvm/lib/Target/AVR/AVRRegisterInfo.td:70
 def R25 : AVRReg<25, "r25">, DwarfRegNum<[25]>;
-def R26 : AVRReg<26, "r26">, DwarfRegNum<[26]>;
-def R27 : AVRReg<27, "r27">, DwarfRegNum<[27]>;
-def R28 : AVRReg<28, "r28">, DwarfRegNum<[28]>;
-def R29 : AVRReg<29, "r29">, DwarfRegNum<[29]>;
-def R30 : AVRReg<30, "r30">, DwarfRegNum<[30]>;
-def R31 : AVRReg<31, "r31">, DwarfRegNum<[31]>;
+def R26 : AVRReg<26, "r26", [], ["xl"]>, DwarfRegNum<[26]>;
+def R27 : AVRReg<27, "r27", [], ["xh"]>, DwarfRegNum<[27]>;
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aykevl wrote:
> benshi001 wrote:
> > how about also add alias `__tmp_reg__` for `R0` and `__zero_reg__` for `R1` as avr-gcc does?
> > 
> I _think_ this is implemented slightly differently in GCC. For example, if you take a look here (https://godbolt.org/z/sdEcc7) you can see that it defines `__tmp_reg__` separately. Also, note that these two registers (`__tmp_reg__` and `__zero_reg__`) are different on "reduced tiny" chips, see https://gcc.gnu.org/wiki/avr-gcc#Reduced_Tiny - I'm not sure this difference can be easily expressed in this register file description.
I see. Thanks.


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https://reviews.llvm.org/D96492